Notebooks · lib/rv32/tests/riscv/rv32ui_slti
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lib/rv32/tests/riscv/rv32ui_slti.viv · 1 code cellOpen in the workbenchDownload .vivLook inside this program
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[1]lines 1–184
# riscv-tests rv32ui/slti.S, preprocessed by tools/rv32/riscv_tests.py # (riscv-tests commit 7b68f7b91f82; BSD-3-Clause, The Regents of the # University of California). Generated: do not edit. from rv32.system import run_asm, STEP_LIMIT SOURCE = """ .text _start: test_2: li gp, 2 li x13, 0 slti x14, x13, 0 li x7, 0 bne x14, x7, fail test_3: li gp, 3 li x13, 1 slti x14, x13, 1 li x7, 0 bne x14, x7, fail test_4: li gp, 4 li x13, 3 slti x14, x13, 7 li x7, 1 bne x14, x7, fail test_5: li gp, 5 li x13, 7 slti x14, x13, 3 li x7, 0 bne x14, x7, fail test_6: li gp, 6 li x13, 0 slti x14, x13, -2048 li x7, 0 bne x14, x7, fail test_7: li gp, 7 li x13, 2147483648 slti x14, x13, 0 li x7, 1 bne x14, x7, fail test_8: li gp, 8 li x13, 2147483648 slti x14, x13, -2048 li x7, 1 bne x14, x7, fail test_9: li gp, 9 li x13, 0 slti x14, x13, 2047 li x7, 1 bne x14, x7, fail test_10: li gp, 10 li x13, 2147483647 slti x14, x13, 0 li x7, 0 bne x14, x7, fail test_11: li gp, 11 li x13, 2147483647 slti x14, x13, 2047 li x7, 0 bne x14, x7, fail test_12: li gp, 12 li x13, 2147483648 slti x14, x13, 2047 li x7, 1 bne x14, x7, fail test_13: li gp, 13 li x13, 2147483647 slti x14, x13, -2048 li x7, 0 bne x14, x7, fail test_14: li gp, 14 li x13, 0 slti x14, x13, -1 li x7, 0 bne x14, x7, fail test_15: li gp, 15 li x13, 4294967295 slti x14, x13, 1 li x7, 1 bne x14, x7, fail test_16: li gp, 16 li x13, 4294967295 slti x14, x13, -1 li x7, 0 bne x14, x7, fail test_17: li gp, 17 li x11, 11 slti x11, x11, 13 li x7, 1 bne x11, x7, fail test_18: li gp, 18 li x4, 0 1: li x1, 15 slti x14, x1, 10 addi x6, x14, 0 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 0 bne x6, x7, fail test_19: li gp, 19 li x4, 0 1: li x1, 10 slti x14, x1, 16 nop addi x6, x14, 0 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 1 bne x6, x7, fail test_20: li gp, 20 li x4, 0 1: li x1, 16 slti x14, x1, 9 nop nop addi x6, x14, 0 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 0 bne x6, x7, fail test_21: li gp, 21 li x4, 0 1: li x1, 11 slti x14, x1, 15 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 1 bne x14, x7, fail test_22: li gp, 22 li x4, 0 1: li x1, 17 nop slti x14, x1, 8 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 0 bne x14, x7, fail test_23: li gp, 23 li x4, 0 1: li x1, 12 nop nop slti x14, x1, 14 addi x4, x4, 1 li x5, 2 bne x4, x5, 1b li x7, 1 bne x14, x7, fail test_24: li gp, 24 slti x1, x0, -1 li x7, 0 bne x1, x7, fail test_25: li gp, 25 li x1, 16711935 slti x0, x1, -1 li x7, 0 bne x0, x7, fail bne x0, gp, pass fail: mv a0, gp li a7, 93 ecall pass: li gp, 1 li a7, 93 li a0, 0 ecall .data .data """ result = run_asm(SOURCE, STEP_LIMIT) show "rv32ui-slti", result.exit_code, result.steps test "rv32ui-slti passes every case" { assert_true(result.halted) assert_true(result.exit_code == 0) } # SPDX-License-Identifier: BSD-3-Clause # SPDX-FileCopyrightText: 2012-2015 The Regents of the University of California (Regents) # SPDX-FileCopyrightText: 2026 The Viv authors