lib/rv32/tests/riscv/rv32ui_lui.viv

# riscv-tests rv32ui/lui.S, preprocessed by tools/rv32/riscv_tests.py
# (riscv-tests commit 7b68f7b91f82; BSD-3-Clause, The Regents of the
# University of California). Generated: do not edit.

from rv32.system import run_asm, STEP_LIMIT

SOURCE = """
.text
_start:
test_2: li gp, 2
lui x1, 0x00000
li x7, 0
bne x1, x7, fail
test_3: li gp, 3
lui x1, 0xfffff
sra x1,x1,1
li x7, 4294965248
bne x1, x7, fail
test_4: li gp, 4
lui x1, 0x7ffff
sra x1,x1,20
li x7, 2047
bne x1, x7, fail
test_5: li gp, 5
lui x1, 0x80000
sra x1,x1,20
li x7, 4294965248
bne x1, x7, fail
test_6: li gp, 6
lui x0, 0x80000
li x7, 0
bne x0, x7, fail
bne x0, gp, pass
fail: mv a0, gp
li a7, 93
ecall
pass: li gp, 1
li a7, 93
li a0, 0
ecall
.data
.data
"""

result = run_asm(SOURCE, STEP_LIMIT)
show "rv32ui-lui", result.exit_code, result.steps

test "rv32ui-lui passes every case" {
    assert_true(result.halted)
    assert_true(result.exit_code == 0)
}

# SPDX-License-Identifier: BSD-3-Clause
# SPDX-FileCopyrightText: 2012-2015 The Regents of the University of California (Regents)
# SPDX-FileCopyrightText: 2026 The Viv authors