# riscv-tests rv32ui/ld_st.S, preprocessed by tools/rv32/riscv_tests.py
# (riscv-tests commit 7b68f7b91f82; BSD-3-Clause, The Regents of the
# University of California). Generated: do not edit.
from rv32.system import run_asm, STEP_LIMIT
SOURCE = """
.text
_start:
test_2: li gp, 2
la x2, tdat
li x1, 0xffffffffffffffdd
sb x1, 0(x2)
lb x14, 0(x2)
sb x14, 0(x2)
lb x2, 0(x2)
li x7, 0xffffffffffffffdd
bne x2, x7, fail
la x2, tdat
sw x2,8(x2)
lw x4,8(x2)
sb x1, 0(x4)
bne x4, x2, fail
lb x14, 0(x4)
bne x14, x7, fail
test_3: li gp, 3
la x2, tdat
li x1, 0xffffffffffffffcd
sb x1, 1(x2)
lb x14, 1(x2)
sb x14, 1(x2)
lb x2, 1(x2)
li x7, 0xffffffffffffffcd
bne x2, x7, fail
la x2, tdat
sw x2,8(x2)
lw x4,8(x2)
sb x1, 1(x4)
bne x4, x2, fail
lb x14, 1(x4)
bne x14, x7, fail
test_4: li gp, 4
la x2, tdat
li x1, 0xffffffffffffffcc
sb x1, 2(x2)
lb x14, 2(x2)
sb x14, 2(x2)
lb x2, 2(x2)
li x7, 0xffffffffffffffcc
bne x2, x7, fail
la x2, tdat
sw x2,8(x2)
lw x4,8(x2)
sb x1, 2(x4)
bne x4, x2, fail
lb x14, 2(x4)
bne x14, x7, fail
test_5: li gp, 5
la x2, tdat
li x1, 0xffffffffffffffbc